Microblaze linux在“已禁用引导控制台[earlyser0]时停止引导”

Microblaze linux在“已禁用引导控制台[earlyser0]时停止引导”,linux,embedded,dts,buildroot,device-tree,Linux,Embedded,Dts,Buildroot,Device Tree,我想在nexys 4 ddr板上嵌入linux。 我制作了一个基本系统:microblaze+ddr+uartlite+gpios Linux映像由build root 2014.05制作 禁用引导控制台[earlyser0]后Linux引导停止 发生了一些奇怪的事情:我把console=ttyUL0和BR2\u TARGET\u GENERIC\u GETTY\u PORT=ttyUL0放在一起,但是,启动时我看到40600000.serial.ttyUL1,有一些解释吗 不管怎样,在dts和

我想在nexys 4 ddr板上嵌入linux。 我制作了一个基本系统:microblaze+ddr+uartlite+gpios Linux映像由build root 2014.05制作

禁用引导控制台[earlyser0]后Linux引导停止

发生了一些奇怪的事情:我把console=ttyUL0和BR2\u TARGET\u GENERIC\u GETTY\u PORT=ttyUL0放在一起,但是,启动时我看到40600000.serial.ttyUL1,有一些解释吗

不管怎样,在dts和defconfig中加入UL1都会得到相同的结果

我的dts

/dts-v1/;

/ {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "xlnx,microblaze";
    model = "Xilinx MicroBlaze";
    memory {
        device_type = "memory";
        reg = <0x80000000 0x8000000>;
        };
    aliases {
        serial0 = &axi_uartlite_0;
        };
    chosen {
        bootargs = "console=ttyUL1";
        linux,stdout-path = "/amba_pl/serial@40600000";
        };
    cpus {
        #address-cells = <1>;
        #cpus = <1>;
        #size-cells = <0>;
        microblaze_0: cpu@0 {
            bus-handle = <&amba_pl>;
            clock-frequency = <100000000>;
            clocks = <&clk_cpu>;
            compatible = "xlnx,microblaze-9.4";
            d-cache-baseaddr = <0x80000000>;
            d-cache-highaddr = <0x87ffffff>;
            d-cache-line-size = <0x10>;
            d-cache-size = <0x4000>;
            device_type = "cpu";
            i-cache-baseaddr = <0x80000000>;
            i-cache-highaddr = <0x87ffffff>;
            i-cache-line-size = <0x20>;
            i-cache-size = <0x4000>;
            interrupt-handle = <&microblaze_0_axi_intc>;
            model = "microblaze,9.4";
            timebase-frequency = <100000000>;
            xlnx,addr-tag-bits = <0xd>;
            xlnx,allow-dcache-wr = <0x1>;
            xlnx,allow-icache-wr = <0x1>;
            xlnx,area-optimized = <0x0>;
            xlnx,async-interrupt = <0x1>;
            xlnx,avoid-primitives = <0x0>;
            xlnx,base-vectors = <0x00000000>;
            xlnx,branch-target-cache-size = <0x0>;
            xlnx,cache-byte-size = <0x4000>;
            xlnx,d-axi = <0x1>;
            xlnx,d-lmb = <0x1>;
            xlnx,data-size = <0x20>;
            xlnx,dcache-addr-tag = <0xd>;
            xlnx,dcache-always-used = <0x1>;
            xlnx,dcache-byte-size = <0x4000>;
            xlnx,dcache-data-width = <0x0>;
            xlnx,dcache-force-tag-lutram = <0x0>;
            xlnx,dcache-line-len = <0x4>;
            xlnx,dcache-use-writeback = <0x0>;
            xlnx,dcache-victims = <0x8>;
            xlnx,debug-counter-width = <0x20>;
            xlnx,debug-enabled = <0x1>;
            xlnx,debug-event-counters = <0x5>;
            xlnx,debug-external-trace = <0x0>;
            xlnx,debug-latency-counters = <0x1>;
            xlnx,debug-profile-size = <0x0>;
            xlnx,debug-trace-size = <0x2000>;
            xlnx,div-zero-exception = <0x1>;
            xlnx,dynamic-bus-sizing = <0x0>;
            xlnx,ecc-use-ce-exception = <0x0>;
            xlnx,edge-is-positive = <0x1>;
            xlnx,enable-discrete-ports = <0x0>;
            xlnx,endianness = <0x1>;
            xlnx,fault-tolerant = <0x0>;
            xlnx,fpu-exception = <0x0>;
            xlnx,freq = <0x5f5e100>;
            xlnx,fsl-exception = <0x0>;
            xlnx,fsl-links = <0x0>;
            xlnx,i-axi = <0x0>;
            xlnx,i-lmb = <0x1>;
            xlnx,icache-always-used = <0x1>;
            xlnx,icache-data-width = <0x0>;
            xlnx,icache-force-tag-lutram = <0x0>;
            xlnx,icache-line-len = <0x8>;
            xlnx,icache-streams = <0x1>;
            xlnx,icache-victims = <0x8>;
            xlnx,ill-opcode-exception = <0x1>;
            xlnx,interconnect = <0x2>;
            xlnx,interrupt-is-edge = <0x0>;
            xlnx,lockstep-select = <0x0>;
            xlnx,lockstep-slave = <0x0>;
            xlnx,mmu-dtlb-size = <0x4>;
            xlnx,mmu-itlb-size = <0x2>;
            xlnx,mmu-privileged-instr = <0x0>;
            xlnx,mmu-tlb-access = <0x3>;
            xlnx,mmu-zones = <0x2>;
            xlnx,num-sync-ff-clk = <0x2>;
            xlnx,num-sync-ff-clk-debug = <0x2>;
            xlnx,num-sync-ff-clk-irq = <0x1>;
            xlnx,num-sync-ff-dbg-clk = <0x1>;
            xlnx,number-of-pc-brk = <0x1>;
            xlnx,number-of-rd-addr-brk = <0x0>;
            xlnx,number-of-wr-addr-brk = <0x0>;
            xlnx,opcode-0x0-illegal = <0x1>;
            xlnx,optimization = <0x0>;
            xlnx,pc-width = <0x20>;
            xlnx,pvr = <0x2>;
            xlnx,pvr-user1 = <0x00>;
            xlnx,pvr-user2 = <0x00000000>;
            xlnx,reset-msr = <0x00000000>;
            xlnx,sco = <0x0>;
            xlnx,trace = <0x0>;
            xlnx,unaligned-exceptions = <0x1>;
            xlnx,use-barrel = <0x1>;
            xlnx,use-branch-target-cache = <0x0>;
            xlnx,use-config-reset = <0x0>;
            xlnx,use-dcache = <0x1>;
            xlnx,use-div = <0x1>;
            xlnx,use-ext-brk = <0x0>;
            xlnx,use-ext-nm-brk = <0x0>;
            xlnx,use-extended-fsl-instr = <0x0>;
            xlnx,use-fpu = <0x0>;
            xlnx,use-hw-mul = <0x2>;
            xlnx,use-icache = <0x1>;
            xlnx,use-interrupt = <0x2>;
            xlnx,use-mmu = <0x3>;
            xlnx,use-msr-instr = <0x1>;
            xlnx,use-pcmp-instr = <0x1>;
            xlnx,use-reorder-instr = <0x1>;
            xlnx,use-stack-protection = <0x0>;
        };
    };
    clocks {
        #address-cells = <1>;
        #size-cells = <0>;
        clk_cpu: clk_cpu@0 {
            #clock-cells = <0>;
            clock-frequency = <100000000>;
            clock-output-names = "clk_cpu";
            compatible = "fixed-clock";
            reg = <0>;
        };
        clk_bus_0: clk_bus_0@1 {
            #clock-cells = <0>;
            clock-frequency = <100000000>;
            clock-output-names = "clk_bus_0";
            compatible = "fixed-clock";
            reg = <1>;
        };
    };
    amba_pl: amba_pl {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "simple-bus";
        ranges ;
        axi_gpio_0: gpio@40000000 {
            #gpio-cells = <2>;
            compatible = "xlnx,xps-gpio-1.00.a";
            gpio-controller ;
            reg = <0x40000000 0x10000>;
            xlnx,all-inputs = <0x0>;
            xlnx,all-inputs-2 = <0x0>;
            xlnx,all-outputs = <0x1>;
            xlnx,all-outputs-2 = <0x0>;
            xlnx,dout-default = <0x00000000>;
            xlnx,dout-default-2 = <0x00000000>;
            xlnx,gpio-width = <0x10>;
            xlnx,gpio2-width = <0x20>;
            xlnx,interrupt-present = <0x0>;
            xlnx,is-dual = <0x0>;
            xlnx,tri-default = <0xFFFFFFFF>;
            xlnx,tri-default-2 = <0xFFFFFFFF>;
        };
        axi_gpio_1: gpio@40010000 {
            #gpio-cells = <2>;
            compatible = "xlnx,xps-gpio-1.00.a";
            gpio-controller ;
            reg = <0x40010000 0x10000>;
            xlnx,all-inputs = <0x1>;
            xlnx,all-inputs-2 = <0x0>;
            xlnx,all-outputs = <0x0>;
            xlnx,all-outputs-2 = <0x0>;
            xlnx,dout-default = <0x00000000>;
            xlnx,dout-default-2 = <0x00000000>;
            xlnx,gpio-width = <0x10>;
            xlnx,gpio2-width = <0x20>;
            xlnx,interrupt-present = <0x0>;
            xlnx,is-dual = <0x0>;
            xlnx,tri-default = <0xFFFFFFFF>;
            xlnx,tri-default-2 = <0xFFFFFFFF>;
        };
        axi_timer_0: timer@41c00000 {
            clock-frequency = <100000000>;
            clocks = <&clk_bus_0>;
            compatible = "xlnx,xps-timer-1.00.a";
            interrupt-parent = <&microblaze_0_axi_intc>;
            interrupts = <0 2>;
            reg = <0x41c00000 0x10000>;
            xlnx,count-width = <0x20>;
            xlnx,gen0-assert = <0x1>;
            xlnx,gen1-assert = <0x1>;
            xlnx,one-timer-only = <0x0>;
            xlnx,trig0-assert = <0x1>;
            xlnx,trig1-assert = <0x1>;
        };
        axi_uartlite_0: serial@40600000 {
            clock-frequency = <100000000>;
            clocks = <&clk_bus_0>;
            compatible = "xlnx,xps-uartlite-1.00.a";
            current-speed = <115200>;
            device_type = "serial";
            interrupt-parent = <&microblaze_0_axi_intc>;
            interrupts = <1 0>;
            port-number = <1>;
            reg = <0x40600000 0x10000>;
            xlnx,baudrate = <0x1c200>;
            xlnx,data-bits = <0x8>;
            xlnx,odd-parity = <0x0>;
            xlnx,s-axi-aclk-freq-hz-d = <0x64>;
            xlnx,use-parity = <0x0>;
        };
        microblaze_0_axi_intc: interrupt-controller@41200000 {
            #interrupt-cells = <2>;
            compatible = "xlnx,xps-intc-1.00.a";
            interrupt-controller ;
            reg = <0x41200000 0x10000>;
            xlnx,kind-of-intr = <0x2>;
            xlnx,num-intr-inputs = <0x2>;
        };
        mig_7series_0: memory-controller@80000000 {
            compatible = "xlnx,mig-7series-2.3";
            device_type = "memory";
            reg = <0x80000000 0x8000000>;
        };
    };
};
和配置

BR2_microblaze=y
BR2_microblazeel=y

BR2_ARCH="microblazeel"
BR2_ENDIAN="LITTLE"


BR2_TARGET_GENERIC_GETTY_PORT="ttyUL1"
BR2_TARGET_GENERIC_GETTY_BAUDRATE_115200=y
BR2_TARGET_GENERIC_GETTY_BAUDRATE="115200"
BR2_TARGET_GENERIC_GETTY_TERM="vt100"
BR2_TARGET_GENERIC_GETTY_OPTIONS=""
# BR2_TARGET_ROOTFS_TAR is not set
BR2_TARGET_ROOTFS_INITRAMFS=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/digilent/n4ddr/n4ddr_defconfig"
BR2_LINUX_KERNEL_USE_CUSTOM_DTS=y
BR2_LINUX_KERNEL_CUSTOM_DTS_PATH="board/digilent/n4ddr/n4ddr.dts"

BR2_TARGET_GENERIC_HOSTNAME="n4ddr"
BR2_TARGET_GENERIC_ISSUE="Welcome to Digilent + n4ddr + Microblaze + Linux + gmv"
我还附上了uart输出


请提供一些帮助

尝试编辑从引导程序传递到控制台=TTYUL1115200N8的内核的命令行,因为这是您唯一配置的串行端口,并且模式已完全指定。sawdust-感谢您的回答,我将命令行更改为console=TTYUL1115200N8,但没有任何更改
BR2_microblaze=y
BR2_microblazeel=y

BR2_ARCH="microblazeel"
BR2_ENDIAN="LITTLE"


BR2_TARGET_GENERIC_GETTY_PORT="ttyUL1"
BR2_TARGET_GENERIC_GETTY_BAUDRATE_115200=y
BR2_TARGET_GENERIC_GETTY_BAUDRATE="115200"
BR2_TARGET_GENERIC_GETTY_TERM="vt100"
BR2_TARGET_GENERIC_GETTY_OPTIONS=""
# BR2_TARGET_ROOTFS_TAR is not set
BR2_TARGET_ROOTFS_INITRAMFS=y
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/digilent/n4ddr/n4ddr_defconfig"
BR2_LINUX_KERNEL_USE_CUSTOM_DTS=y
BR2_LINUX_KERNEL_CUSTOM_DTS_PATH="board/digilent/n4ddr/n4ddr.dts"

BR2_TARGET_GENERIC_HOSTNAME="n4ddr"
BR2_TARGET_GENERIC_ISSUE="Welcome to Digilent + n4ddr + Microblaze + Linux + gmv"