&引用;传统";在Makefile中
我正在寻找一种方法,将Makefilea的部分重载到另一个B,从而扩展a 例如,我们有以下makefileA:&引用;传统";在Makefile中,makefile,multiple-makefiles,Makefile,Multiple Makefiles,我正在寻找一种方法,将Makefilea的部分重载到另一个B,从而扩展a 例如,我们有以下makefileA: TEXT="AHAHA" default: after-default before-default: echo "BEFORE DEFAULT" default: before-default echo ${TEXT} after-default: default echo "AFTER DEFAULT" 我想在新的MakefileB中重复使用它,
TEXT="AHAHA"
default: after-default
before-default:
echo "BEFORE DEFAULT"
default: before-default
echo ${TEXT}
after-default: default
echo "AFTER DEFAULT"
我想在新的MakefileB中重复使用它,如下所示:
TEXT="HIHIHI"
before-default:
echo "NEW BEFORE DEFAULT"
新的生成文件将打印:
NEW BEFORE DEFAULT
HIHIHI
AFTER DEFAULT
这个例子有点荒谬,这样做是不可能的,但我想知道是否有可能使这样的Makefile合成接近这个想法。在
B
的开头添加包含a
,你的例子将很容易实现。默认值之前的新目标将覆盖旧目标
vnix$ tail *
==> A <==
TEXT="AHAHA"
before-default: default
echo "BEFORE DEFAULT"
default: after-default
echo ${TEXT}
after-default:
echo "AFTER DEFAULT"
==> B <==
include A
TEXT="HIHIHI"
before-default: default
echo "NEW BEFORE DEFAULT"
vnix$ make -sf A
AFTER DEFAULT
AHAHA
BEFORE DEFAULT
vnix$ make -sf B
B:6: warning: overriding commands for target `before-default'
A:4: warning: ignoring old commands for target `before-default'
AFTER DEFAULT
HIHIHI
NEW BEFORE DEFAULT
vnix$tail*
==>A B在B
的开头添加include A
,您的示例将很容易实现。默认值之前的新目标将覆盖旧目标
vnix$ tail *
==> A <==
TEXT="AHAHA"
before-default: default
echo "BEFORE DEFAULT"
default: after-default
echo ${TEXT}
after-default:
echo "AFTER DEFAULT"
==> B <==
include A
TEXT="HIHIHI"
before-default: default
echo "NEW BEFORE DEFAULT"
vnix$ make -sf A
AFTER DEFAULT
AHAHA
BEFORE DEFAULT
vnix$ make -sf B
B:6: warning: overriding commands for target `before-default'
A:4: warning: ignoring old commands for target `before-default'
AFTER DEFAULT
HIHIHI
NEW BEFORE DEFAULT
vnix$tail*
==>ab您可以这样做:
文件Makefile
:
# Define default TEXT
TEXT := HAHAHA
# Define default target
after:
@echo AFTER
run:
@echo $(TEXT)
before:
@echo BEFORE
# Define dependencies
run: before
after: run
# Include the new makefile
include inheritance.mk
文件继承.mk
:
# Redefine TEXT
TEXT := HIHIHI
# Redefine before target
before:
@ echo NEW BEFORE
当您运行make
时,会出现一些警告,但它会按预期工作:
inheritance.mk:4: warning: overriding commands for target `before'
Makefile:10: warning: ignoring old commands for target `before'
NEW BEFORE
HIHIHI
AFTER
您可以这样做:
文件Makefile
:
# Define default TEXT
TEXT := HAHAHA
# Define default target
after:
@echo AFTER
run:
@echo $(TEXT)
before:
@echo BEFORE
# Define dependencies
run: before
after: run
# Include the new makefile
include inheritance.mk
文件继承.mk
:
# Redefine TEXT
TEXT := HIHIHI
# Redefine before target
before:
@ echo NEW BEFORE
当您运行make
时,会出现一些警告,但它会按预期工作:
inheritance.mk:4: warning: overriding commands for target `before'
Makefile:10: warning: ignoring old commands for target `before'
NEW BEFORE
HIHIHI
AFTER
你的依赖链是反向的。输出将以完全相反的顺序打印。因为默认值之前的取决于默认值
,它将首先运行默认值
,然后再处理默认值之前的默认值
。啊,是的,我的错误,修复了它。但是现在第一个产品是默认值之前的
,所以只需简单的make
就可以运行它。您希望反转规则的顺序,以便默认后的是默认目标。您的依赖关系链被反转。输出将以完全相反的顺序打印。因为默认值之前的取决于默认值
,它将首先运行默认值
,然后再处理默认值之前的默认值
。啊,是的,我的错误,修复了它。但是现在第一个产品是默认值之前的
,所以只需简单的make
就可以运行它。您希望反转规则的顺序,以便默认后的是默认目标。