System verilog 系统verilog中任务内的延迟

System verilog 系统verilog中任务内的延迟,system-verilog,System Verilog,我尝试调用另一个任务中的4个任务,如下所示: task execute(); logic [0:3] req1, port_select; logic [0:3] req2; logic [0:3] req3; logic [0:3] req4; logic [0:31] data11, data21; logic [0:31] data12, data22; logic [0:31] data13, data23; logic [0:31]

我尝试调用另一个任务中的4个任务,如下所示:

task execute();

logic [0:3]     req1, port_select;
logic [0:3]     req2;
logic [0:3]     req3;
logic [0:3]     req4;

logic [0:31]    data11, data21;
logic [0:31]    data12, data22;
logic [0:31]    data13, data23;
logic [0:31]    data14, data24;


bfm.reset_task();

//drive multiple ports 
//repeat(1) 
    //begin: random_stimulus
        port_select = generate_combination();
            repeat(1)
                begin: per_combination_iteration    
                    //port1
                    req1 = port_select[0]? generate_command() : 0;
                    data11 = generate_data();
                    data21 = generate_data();
                    //bfm.drive_ip_port1(req,data1,data2);

                    //port2
                    req2 = port_select[1]? generate_command() : 0;
                    data12 = generate_data();
                    data22 = generate_data();
                    //bfm.drive_ip_port2(req,data1,data2);

                    //port3
                    req3 = port_select[2]? generate_command() : 0;
                    data13 = generate_data();
                    data23 = generate_data();
                    //bfm.drive_ip_port3(req,data1,data2);

                    //port4
                    req4 = port_select[3]? generate_command() : 0;
                    data14 = generate_data();
                    data24 = generate_data();
                    //bfm.drive_ip_port4(req,data1,data2);

                    fork 
                                            bfm.drive_ip_port1(req1,data11,data21);
                                            bfm.drive_ip_port2(req2,data12,data22);
                                            bfm.drive_ip_port3(req3,data13,data23);
                                            bfm.drive_ip_port4(req4,data14,data24);

                    join


                end: per_combination_iteration
    //end: random_stimulus 
$stop; 
endtask: execute
//driving port2

task drive_ip_port2(input logic [0:3] req2, input logic [0:31] data1_port2, data2_port2);
    req2_cmd_in = req2;                             //req2 command
    req2_data_in =  data1_port2;                //req2 first operand
    #200;           
    req2_cmd_in = 0;
    req2_data_in = data2_port2;             //req2 second operand 
    #1000;
endtask: drive_ip_port2
我的
驱动器ip\u端口
功能之一如下:

task execute();

logic [0:3]     req1, port_select;
logic [0:3]     req2;
logic [0:3]     req3;
logic [0:3]     req4;

logic [0:31]    data11, data21;
logic [0:31]    data12, data22;
logic [0:31]    data13, data23;
logic [0:31]    data14, data24;


bfm.reset_task();

//drive multiple ports 
//repeat(1) 
    //begin: random_stimulus
        port_select = generate_combination();
            repeat(1)
                begin: per_combination_iteration    
                    //port1
                    req1 = port_select[0]? generate_command() : 0;
                    data11 = generate_data();
                    data21 = generate_data();
                    //bfm.drive_ip_port1(req,data1,data2);

                    //port2
                    req2 = port_select[1]? generate_command() : 0;
                    data12 = generate_data();
                    data22 = generate_data();
                    //bfm.drive_ip_port2(req,data1,data2);

                    //port3
                    req3 = port_select[2]? generate_command() : 0;
                    data13 = generate_data();
                    data23 = generate_data();
                    //bfm.drive_ip_port3(req,data1,data2);

                    //port4
                    req4 = port_select[3]? generate_command() : 0;
                    data14 = generate_data();
                    data24 = generate_data();
                    //bfm.drive_ip_port4(req,data1,data2);

                    fork 
                                            bfm.drive_ip_port1(req1,data11,data21);
                                            bfm.drive_ip_port2(req2,data12,data22);
                                            bfm.drive_ip_port3(req3,data13,data23);
                                            bfm.drive_ip_port4(req4,data14,data24);

                    join


                end: per_combination_iteration
    //end: random_stimulus 
$stop; 
endtask: execute
//driving port2

task drive_ip_port2(input logic [0:3] req2, input logic [0:31] data1_port2, data2_port2);
    req2_cmd_in = req2;                             //req2 command
    req2_data_in =  data1_port2;                //req2 first operand
    #200;           
    req2_cmd_in = 0;
    req2_data_in = data2_port2;             //req2 second operand 
    #1000;
endtask: drive_ip_port2
这就是我努力实现的目标: 我希望执行任务随机驱动4个端口。在第一个时钟上,我希望他们发送命令和数据。然后在下一个时钟上,命令应该是0,并且只需要发送数据

这就是我尝试过的: 如我的代码所示,我已经编写了上述代码。这段代码背后的思想是,由于任务可以处理时间延迟,我可以调用任务一次,传递数据和命令,让任务处理所有工作

我的问题是:
在第一个时钟周期之后,我的延迟为#200(等于我的时钟)。此后,导线应变为0,并在1000秒内保持为0。但是,我从未在命令上获得值0。看起来该命令再次被此任务驱动。我尝试过使用局部变量、监视功能和断点,但仍然无法调试它。有人能告诉我出了什么问题吗?

我不知道为什么
中的
req2\u cmd\u没有设置为零。也许在其他地方有一个压倒一切的任务,比如另一个任务中的打字错误。(试着只调用一个任务,看看它能做什么。)

我知道,如果你想在某个时间点或之后发生什么事情,请等待该时间点,不要使用延迟。最安全的方法是确保从时钟边缘的确定点开始。因此,我更喜欢在测试台上使用如下代码:

task drive_ip_port2(input logic [0:3] req2, 
                    input logic [0:31] data1_port2, data2_port2);
    // Use this or make sure you call the task at a 
    // determined point from the clock
    @ (posedge clk) ; 

    // Signals here change as if they come from a clocked register
    req2_cmd_in  <= req2;                    //req2 command
    req2_data_in <=  data1_port2;            //req2 first operand

    @ (posedge clk) ; 
    req2_cmd_in  <= 0;                       // No command
    req2_data_in <= data2_port2;             // only req2 second operand 

    repeat (4)  // 4 or 5 depends on if you wait for clock at top
       @ (posedge clk) ; 
endtask: drive_ip_port2
任务驱动ip端口2(输入逻辑[0:3]要求2,
输入逻辑[0:31]数据1_端口2,数据2_端口2);
//使用此选项,或确保在指定时间调用任务
//从时钟上确定一点
@(中电);
//这里的信号变化就像来自时钟寄存器一样

req2_cmd_in如果DUT使用posedge,我会更进一步,使用时钟的负边缘作为刺激。@dave_59同意,这也是我使用的解决方案。关于
req2\u cmd\u in=0的任何想法似乎没有被执行?