7段显示器上数字0000至0099的VHDL代码
我是VHDL的初学者,试图在我的电路板(BASYS-3)上编写一个从0000到0099计数的代码,这取决于我按下的开关。问题是,我需要一个开关用于打开和关闭程序,4个开关用于显示最右边的十进制数字,4个开关用于显示“十”(如17中的1)。 电路板上有更多的开关(总共16个),但我认为4是最符合逻辑的,因为小数的二进制编码(比如二进制中的9=1001是最大的) 我不知道使用什么样的盖茨,所以我所做的工作非常有限,很抱歉7段显示器上数字0000至0099的VHDL代码,vhdl,xilinx,vivado,Vhdl,Xilinx,Vivado,我是VHDL的初学者,试图在我的电路板(BASYS-3)上编写一个从0000到0099计数的代码,这取决于我按下的开关。问题是,我需要一个开关用于打开和关闭程序,4个开关用于显示最右边的十进制数字,4个开关用于显示“十”(如17中的1)。 电路板上有更多的开关(总共16个),但我认为4是最符合逻辑的,因为小数的二进制编码(比如二进制中的9=1001是最大的) 我不知道使用什么样的盖茨,所以我所做的工作非常有限,很抱歉 process(bcd_display) begin case b
process(bcd_display)
begin
case bcd_display is
when "0000" => LED <= "0000001";
when "0001" => LED <= "1001111";
when "0010" => LED <= "0010010";
when "0011" => LED <= "0000110";
when "0100" => LED <= "1001100";
when "0101" => LED <= "0100100";
when "0110" => LED <= "0100000";
when "0111" => LED <= "0001111";
when "1000" => LED <= "0000000";
when "1001" => LED <= "0000100";
end case;
end process;
过程(bcd\U显示)
开始
机箱bcd_显示为
当“0000”=>LED用于将来参考时,您需要添加完整的代码&您正在使用的测试台。我仍然写下了我认为对你有用的东西。
请看下面。您需要将每个开关分配给(bcd\u display\u 0
&bcd\u display\u 1
)。要重置程序,请将该开关分配到(rst
),您需要将时钟分配到(clk
)。然后将七段显示分配给(LED_0
&LED_1
)。希望这能让你走。我还为您附上了一个测试台
-- BCD Entity
library ieee;
use ieee.std_logic_1164.all;
entity Display_Test is
port (
clk : in std_logic;
rst : in std_logic;
bcd_display_0 : in std_logic_vector(3 downto 0);-- assign to first set of switches
bcd_display_1 : in std_logic_vector(3 downto 0);-- assign to second set of switches
LED_0 : out std_logic_vector(6 downto 0);-- assign to first 7-segment display
LED_1 : out std_logic_vector(6 downto 0) -- assign to second 7-segment display
);
end Display_Test;
architecture behav of Display_Test is
use ieee.numeric_std.all;
begin
p : process(clk)
begin
if rising_edge(clk) then
if rst = '1' then
LED_0 <= (others => '0');
LED_1 <= (others => '0');
else
case to_integer(unsigned(bcd_display_0)) is
when 0 => LED_0 <= "0000001";
when 1 => LED_0 <= "1001111";
when 2 => LED_0 <= "0010010";
when 3 => LED_0 <= "0000110";
when 4 => LED_0 <= "1001100";
when 5 => LED_0 <= "0100100";
when 6 => LED_0 <= "0100000";
when 7 => LED_0 <= "0001111";
when 8 => LED_0 <= "0000000";
when 9 => LED_0 <= "0000100";
when others => LED_0 <= "0000000";
end case;
case to_integer(unsigned(bcd_display_1)) is
when 0 => LED_1 <= "0000001";
when 1 => LED_1 <= "1001111";
when 2 => LED_1 <= "0010010";
when 3 => LED_1 <= "0000110";
when 4 => LED_1 <= "1001100";
when 5 => LED_1 <= "0100100";
when 6 => LED_1 <= "0100000";
when 7 => LED_1 <= "0001111";
when 8 => LED_1 <= "0000000";
when 9 => LED_1 <= "0000100";
when others => LED_1 <= "0000000";
end case;
end if;
end if;
end process;
end behav;
--TestBench
entity tb_bcd is
end tb_bcd;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tb_bcd is
signal clk : std_logic := '1';
signal rst : std_logic := '1';
signal bcd_display_0 : std_logic_vector(3 downto 0);
signal bcd_display_1 : std_logic_vector(3 downto 0);
signal LED_0 : std_logic_vector(6 downto 0);
signal LED_1 : std_logic_vector(6 downto 0);
begin
clk <= not clk after 50 ns;
rst <= '0' after 200 ns;
bcd_display_0 <= "0110" after 250 ns;
bcd_display_1 <= "0010" after 280 ns;
Display_Test_inst : entity work.Display_Test
port map (
clk => clk,
rst => rst,
bcd_display_0 => bcd_display_0,
bcd_display_1 => bcd_display_1,
LED_0 => LED_0,
LED_1 => LED_1
);
end behav;
——BCD实体
图书馆ieee;
使用ieee.std_logic_1164.all;
实体显示测试为
港口(
clk:标准逻辑中;
rst:标准逻辑中;
bcd_显示_0:标准逻辑_向量(3向下到0);--分配给第一组开关
bcd_显示_1:标准逻辑_向量(3向下到0);--分配给第二组开关
LED_0:输出标准逻辑_矢量(6向下至0);--分配给第一个7段显示器
LED_1:输出标准逻辑_矢量(6到0)-分配给第二个7段显示器
);
末端显示试验;
显示测试的体系结构行为是
使用ieee.numeric_std.all;
开始
p:过程(clk)
开始
如果上升沿(clk),则
如果rst='1',则
LED_0'0');
发光二极管(1'0');
其他的
大小写到整数(无符号(bcd\U显示\U 0))为
当0=>发光二极管0发光二极管0发光二极管0发光二极管0发光二极管0发光二极管0发光二极管0发光二极管0发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管1发光二极管,
LED_1=>LED_1
);
结束行为;
因此,您不想计数,只想解码双位数BCD。请给我们提供一份报告,让我们看看你已经走了多远。顺便说一句,BASYS-3的可用文档应该有足够的示例可以查看和学习。非常感谢,这是我的第一篇文章,对于缺乏信息感到非常抱歉。但这有助于ot@selinoktay您可以随时添加原始问题并使其更好。