Windows phone 无法运行wp8模拟器

Windows phone 无法运行wp8模拟器,windows-phone,windows-phone-8,windows-phone-8-emulator,Windows Phone,Windows Phone 8,Windows Phone 8 Emulator,我试图启动wp8模拟器,但它总是显示一般错误和失败。 我使用coreinfo显示系统信息 Intel(R) Core(TM) i3 CPU 530 @ 2.93GHz Intel64 Family 6 Model 37 Stepping 2, GenuineIntel HTT - Hyperthreading enabled HYPERVISOR * Hypervisor is present VMX - Supports Inte

我试图启动wp8模拟器,但它总是显示一般错误和失败。 我使用coreinfo显示系统信息

Intel(R) Core(TM) i3 CPU         530  @ 2.93GHz
Intel64 Family 6 Model 37 Stepping 2, GenuineIntel
HTT         -   Hyperthreading enabled
HYPERVISOR  *   Hypervisor is present
VMX         -   Supports Intel hardware-assisted virtualization
SVM         -   Supports AMD hardware-assisted virtualization
EM64T       *   Supports 64-bit mode

SMX         -   Supports Intel trusted execution
SKINIT      -   Supports AMD SKINIT

NX          *   Supports no-execute page protection
SMEP        -   Supports Supervisor Mode Execution Prevention
SMAP        -   Supports Supervisor Mode Access Prevention
PAGE1GB     -   Supports 1 GB large pages
PAE         *   Supports > 32-bit physical addresses
PAT         *   Supports Page Attribute Table
PSE         *   Supports 4 MB pages
PSE36       *   Supports > 32-bit address 4 MB pages
PGE         *   Supports global bit in page tables
SS          *   Supports bus snooping for cache operations
VME         *   Supports Virtual-8086 mode
RDWRFSGSBASE    -   Supports direct GS/FS base access

FPU         *   Implements i387 floating point instructions
MMX         *   Supports MMX instruction set
MMXEXT      -   Implements AMD MMX extensions
3DNOW       -   Supports 3DNow! instructions
3DNOWEXT    -   Supports 3DNow! extension instructions
SSE         *   Supports Streaming SIMD Extensions
SSE2        *   Supports Streaming SIMD Extensions 2
SSE3        *   Supports Streaming SIMD Extensions 3
SSSE3       *   Supports Supplemental SIMD Extensions 3
SSE4.1      *   Supports Streaming SIMD Extensions 4.1
SSE4.2      *   Supports Streaming SIMD Extensions 4.2

AES         -   Supports AES extensions
AVX         -   Supports AVX intruction extensions
FMA         -   Supports FMA extensions using YMM state
MSR         *   Implements RDMSR/WRMSR instructions
MTRR        *   Supports Memory Type Range Registers
XSAVE       -   Supports XSAVE/XRSTOR instructions
OSXSAVE     -   Supports XSETBV/XGETBV instructions
RDRAND      -   Supports RDRAND instruction
RDSEED      -   Supports RDSEED instruction

CMOV        *   Supports CMOVcc instruction
CLFSH       *   Supports CLFLUSH instruction
CX8         *   Supports compare and exchange 8-byte instructions
CX16        *   Supports CMPXCHG16B instruction
BMI1        -   Supports bit manipulation extensions 1
BMI2        -   Supports bit maniuplation extensions 2
ADX         -   Supports ADCX/ADOX instructions
DCA         -   Supports prefetch from memory-mapped device
F16C        -   Supports half-precision instruction
FXSR        *   Supports FXSAVE/FXSTOR instructions
FFXSR       -   Supports optimized FXSAVE/FSRSTOR instruction
MONITOR     -   Supports MONITOR and MWAIT instructions
MOVBE       -   Supports MOVBE instruction
ERMSB       -   Supports Enhanced REP MOVSB/STOSB
PCLULDQ     -   Supports PCLMULDQ instruction
POPCNT      *   Supports POPCNT instruction
SEP         *   Supports fast system call instructions
LAHF-SAHF   *   Supports LAHF/SAHF instructions in 64-bit mode
HLE         -   Supports Hardware Lock Elision instructions
RTM         -   Supports Restricted Transactional Memory instructions

DE          *   Supports I/O breakpoints including CR4.DE
DTES64      -   Can write history of 64-bit branch addresses
DS          *   Implements memory-resident debug buffer
DS-CPL      -   Supports Debug Store feature with CPL
PCID        -   Supports PCIDs and settable CR4.PCIDE
INVPCID     -   Supports INVPCID instruction
PDCM        -   Supports Performance Capabilities MSR
RDTSCP      *   Supports RDTSCP instruction
TSC         *   Supports RDTSC instruction
TSC-DEADLINE    -   Local APIC supports one-shot deadline timer
TSC-INVARIANT   *   TSC runs at constant rate
xTPR        -   Supports disabling task priority messages

EIST        -   Supports Enhanced Intel Speedstep
ACPI        -   Implements MSR for power management
TM          -   Implements thermal monitor circuitry
TM2         -   Implements Thermal Monitor 2 control
APIC        *   Implements software-accessible local APIC
x2APIC      *   Supports x2APIC

CNXT-ID     -   L1 data cache mode adaptive or BIOS

MCE         *   Supports Machine Check, INT18 and CR4.MCE
MCA         *   Implements Machine Check Architecture
PBE         -   Supports use of FERR#/PBE# pin

PSN         -   Implements 96-bit processor serial number

PREFETCHW   *   Supports PREFETCHW instruction

Logical to Physical Processor Map:
*  Physical Processor 0

Logical Processor to Socket Map:
*  Socket 0

Logical Processor to NUMA Node Map:
*  NUMA Node 0

Logical Processor to Cache Map:
*  Data Cache          0, Level 1,   32 KB, Assoc   8, LineSize  64
*  Instruction Cache   0, Level 1,   32 KB, Assoc   4, LineSize  64
*  Unified Cache       0, Level 2,  256 KB, Assoc   8, LineSize  64
*  Unified Cache       1, Level 3,    4 MB, Assoc  16, LineSize  64

Logical Processor to Group Map:
*  Group 0
我需要更换哪些硬件


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您应该执行以下操作,以验证EPT支持扩展页面表(SLAT)是否可用

c:>coreinfo-v

此标志将仅显示CPU的虚拟化功能

例如,我的输出:

Coreinfo v3.2-系统CPU和内存拓扑的转储信息 版权所有(C)2008-2012 Mark Russinovich Sysinternals-www.Sysinternals.com

英特尔(R)核心(TM)2四处理器Q9650@3.00GHz

Intel64系列6型23步进10,GenuineIntel


在这种情况下,我的机器不支持运行WP8模拟器,因为我没有EPT(SLAT)功能。您通常需要一个英特尔i系列处理器。

您应该执行以下操作,以验证EPT支持扩展页表(SLAT)是否可用

c:>coreinfo-v

此标志将仅显示CPU的虚拟化功能

例如,我的输出:

Coreinfo v3.2-系统CPU和内存拓扑的转储信息 版权所有(C)2008-2012 Mark Russinovich Sysinternals-www.Sysinternals.com

英特尔(R)核心(TM)2四处理器Q9650@3.00GHz

Intel64系列6型23步进10,GenuineIntel

在这种情况下,我的机器不支持运行WP8模拟器,因为我没有EPT(SLAT)功能。您通常需要一个英特尔i系列处理器。

您的CPU(Intel64系列6型号37 Stepping 2)是一个基于Xeon CPU的5300 aka Clovertown aka内核

Win8 Hyper-V需要SLAT(二级地址转换)或EPT(英特尔术语)支持, 它仅在基于Nehalem的Xeon(或更新的)CPU上可用。

您的CPU(Intel64系列6型号37 Stepping 2)是基于5300 aka Clovertown aka的Xeon CPU

Win8 Hyper-V需要SLAT(二级地址转换)或EPT(英特尔术语)支持,
仅在基于Xeon(或更新版本)的Nehalem上提供CPU。

您可能安装了另一个虚拟化软件,如VMware,输出显示存在虚拟机监控程序。

您可能安装了另一个虚拟化软件,如VMware,输出显示存在虚拟机监控程序。

是的,Intel CPU命名非常混乱。例如,这样的CPU不会有SSE4.2。是的,IntelCPU命名非常混乱。例如,这样的CPU不会有SSE4.2。
HYPERVISOR     -       Hypervisor is present

VMX            *       Supports Intel hardware-assisted virtualization

EPT            -       Supports Intel extended page tables (SLAT)
( asterisk means your CPU has it )