Verilog 有没有办法防止covergroup垃圾箱的创建

是否有一种方法可以保护显式命名bin的创建，如图所示

coverpoints_bins: coverpoint signal_a
bins a1 = {1};
bins a2 = {2};
bins a4 = {4}; <--- create bin a4 only if parameter "CREATE_A4 is 1"

注意：create_iff只是一些伪代码函数，用于防止创建箱子，除非条件为真

---

因为据我所知，

iff

条件并不防止创建箱子，而

iff

仅用于防止箱子命中

您可以使用

with

子句来选择箱子

bins a4 = {4} with (CREATE_A4 == 1); 

这可能会生成一条警告消息，说明您设置了一个空箱子。另一种方法是使用bin set数组

int my_bins[];
...
if (CREATE_A4 == 1) // execute this before constructing the covergroup
   my_bins = {1,2,4};
else
   my_bins = {1,2};

...
coverpoints_bins: coverpoint signal_a
bins a[] = my_bins;

int my_bins[];
...
if (CREATE_A4 == 1) // execute this before constructing the covergroup
   my_bins = {1,2,4};
else
   my_bins = {1,2};

...
coverpoints_bins: coverpoint signal_a
bins a[] = my_bins;