Amazon ec2 AWS F1从Vitis HLS项目中获取Vivado IP并用于HDK流程

在这方面，我从ThomasXilinx得到了极好的帮助[https://forums.aws.amazon.com/message.jspa?messageID=954888]

我复制粘贴了他建议的vadd.tcl顶级文件，并从同一vitis/examples/hello_world目录运行了“vitis_hls-f vadd.tcl”，结果如下：

INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/centos/aws-fpga/patches/AR73068_Vivado_2019_2_preliminary_rev1/vivado/data/ip'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2019.2/data/ip'.
INFO: [Common 17-206] Exiting Vivado at Thu Sep  3 21:29:13 2020...
INFO: [HLS 200-802] Generated output file prj/solution/impl/export.zip

他指出，在此之后，生成的RTL（或生成的Vivado IP）可以用于HDK流。我在这里看到解压缩后的结果：

  inflating: constraints/vadd_vadd_ooc.xdc  
  inflating: hdl/verilog/vadd_vadd_add_11ns_11ns_11_1_1.v  
  inflating: hdl/verilog/vadd_vadd_add_32ns_32ns_32_1_1.v  
  inflating: hdl/verilog/vadd_vadd_add_33s_33ns_33_1_1.v  
  inflating: hdl/verilog/vadd_vadd_add_64ns_64ns_64_1_1.v  
  inflating: hdl/verilog/vadd_vadd_control_s_axi.v  
  inflating: hdl/verilog/vadd_vadd_gmem_m_axi.v  
  inflating: hdl/verilog/vadd_vadd_sub_23ns_23ns_23_1_1.v  
  inflating: hdl/verilog/vadd_vadd_sub_32s_32ns_32_1_1.v  
  inflating: hdl/verilog/vadd_vadd_sub_33s_33s_33_1_1.v  
  inflating: hdl/verilog/vadd_vadd_v1_buffer.v  
  inflating: hdl/verilog/vadd_vadd.v  
  inflating: hdl/vhdl/vadd_vadd_add_11ns_11ns_11_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_add_32ns_32ns_32_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_add_33s_33ns_33_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_add_64ns_64ns_64_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_control_s_axi.vhd  
  inflating: hdl/vhdl/vadd_vadd_gmem_m_axi.vhd  
  inflating: hdl/vhdl/vadd_vadd_sub_23ns_23ns_23_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_sub_32s_32ns_32_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_sub_33s_33s_33_1_1.vhd  
  inflating: hdl/vhdl/vadd_vadd_v1_buffer.vhd  
  inflating: hdl/vhdl/vadd_vadd.vhd  
  inflating: drivers/vadd_vadd_v1_0/data/vadd_vadd.mdd  
  inflating: drivers/vadd_vadd_v1_0/data/vadd_vadd.tcl  
  inflating: drivers/vadd_vadd_v1_0/src/Makefile  
  inflating: drivers/vadd_vadd_v1_0/src/xvadd_vadd.c  
  inflating: drivers/vadd_vadd_v1_0/src/xvadd_vadd.h  
  inflating: drivers/vadd_vadd_v1_0/src/xvadd_vadd_hw.h  
  inflating: drivers/vadd_vadd_v1_0/src/xvadd_vadd_linux.c  
  inflating: drivers/vadd_vadd_v1_0/src/xvadd_vadd_sinit.c  
  inflating: doc/ReleaseNotes.txt    
  inflating: misc/logo.png           
  inflating: xgui/vadd_v1_0.tcl

我如何在HDK流中的简单cl_hello_world（理想情况下是cl_hello_world_vhdl）示例中使用这些