Arrays 比较赋值的整数值与标准逻辑向量
我有一个范围为0到23的整数数组，它存储范围为0到2的值 例如： 现在我想把这个字符串分成3个序列，然后比较如下Arrays 比较赋值的整数值与标准逻辑向量,arrays,integer,vhdl,vivado,Arrays,Integer,Vhdl,Vivado,我有一个范围为0到23的整数数组，它存储范围为0到2的值 例如： 现在我想把这个字符串分成3个序列，然后比较如下 nibble(0) <= "0000" when slave_24symbol(012) = 120 else-- "0001" when slave_24symbol(012)= 200 else "0010" when slave_24symbol(012)= 020 else "1111"; nibble（0）这个问题展
nibble(0) <= "0000" when slave_24symbol(012) = 120 else--
"0001" when slave_24symbol(012)= 200 else
"0010" when slave_24symbol(012)= 020 else
"1111";
nibble（0）这个问题展示了python的语法思维
在std_逻辑_向量数组中，有一个约束整数数组被转换为二进制表示
首先是分配半字节一个元素的工作：
library ieee;
use ieee.std_logic_1164.all;
entity depython is
end entity;
architecture foo of depython is
type t_slave_24symbol is array (natural range <>) of integer range 0 to 2;
signal slave_24symbol: t_slave_24symbol (0 to 23);
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
signal nibble: nibble_array;
signal nibble_full: std_logic_vector(31 downto 0) := (others => '0');
subtype nyyblet is t_slave_24symbol (0 to 2);
begin
-- nibble(0) <= "0000" when slave_24symbol(012) = 120 else--
-- "0001" when slave_24symbol(012)= 200 else
-- "0010" when slave_24symbol(012)= 020 else
-- "1111";
-- BECOMES:
nibble(0) <= "0000" when slave_24symbol(0 to 2) = nyyblet'(1, 2, 0) else
"0001" when slave_24symbol(0 to 2) = nyyblet'(2, 0, 0) else
"0010" when slave_24symbol(0 to 2) = nyyblet'(0, 2, 0) else
"1111";
end architecture;
这里使用函数调用来隐藏一些复杂性。循环语句中的顺序赋值语句（顺序语句本身）使用偏移量算法来处理正在求值的ofslave\u 24symbol
的三个受约束整数的所有八个片
因为问题显示了一个半字节元素在条件信号分配（这里是并发信号分配）中被分配，所以使用generate语句的并发分配版本：
architecture concurrent of depython is
type t_slave_24symbol is array (natural range <>) of integer range 0 to 2;
signal slave_24symbol: t_slave_24symbol (0 to 23);
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
signal nibble: nibble_array;
signal nibble_full: std_logic_vector(31 downto 0) := (others => '0');
subtype nyyblet is t_slave_24symbol (0 to 2);
function nybble (nyb: nyyblet) return std_logic_vector is
-- retv: std_logic_vector(3 downto 0);
begin
if nyb = nyyblet'(1, 2, 0) then
return "0000";
elsif nyb = nyyblet'(2, 0, 0) then
return "0001";
elsif nyb = nyyblet'(0, 2, 0) then
return "0010";
else
return "1111";
end if;
end function;
begin
-- process (slave_24symbol)
-- begin
-- for i in nibble'range loop
-- nibble(i) <= nybble(slave_24symbol(3 * i to 2 + i * 3));
-- end loop;
-- end process;
NIBBLE_IT:
for i in nibble'range generate
nibble(i) <= nybble(slave_24symbol(3 * i to 2 + i * 3));
end generate;
end architecture;
添加to_字符串函数是为了与-2008之前的VHDL版本兼容。初始化信号\u slave\u 24symbol
，以证明转换成功：
/usr/local/bin/ghdl-a depython1.vhdl
/usr/local/bin/ghdl-e德皮顿
/usr/local/bin/ghdl-r德皮顿
depython1.vhdl:79:9:@0ms：（报告注释）：半字节\u全=0000000 1001011111111
非常感谢您的时间和耐心。解释得很好。：）
nibble_full <= nibble(0) & nibble(1) & nibble(2) & nibble(3) & nibble(4)
& nibble(5) & nibble(6) & nibble(7);
library ieee;
use ieee.std_logic_1164.all;
entity depython is
end entity;
architecture foo of depython is
type t_slave_24symbol is array (natural range <>) of integer range 0 to 2;
signal slave_24symbol: t_slave_24symbol (0 to 23);
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
signal nibble: nibble_array;
signal nibble_full: std_logic_vector(31 downto 0) := (others => '0');
subtype nyyblet is t_slave_24symbol (0 to 2);
begin
-- nibble(0) <= "0000" when slave_24symbol(012) = 120 else--
-- "0001" when slave_24symbol(012)= 200 else
-- "0010" when slave_24symbol(012)= 020 else
-- "1111";
-- BECOMES:
nibble(0) <= "0000" when slave_24symbol(0 to 2) = nyyblet'(1, 2, 0) else
"0001" when slave_24symbol(0 to 2) = nyyblet'(2, 0, 0) else
"0010" when slave_24symbol(0 to 2) = nyyblet'(0, 2, 0) else
"1111";
end architecture;
architecture sequential of depython is
type t_slave_24symbol is array (natural range <>) of integer range 0 to 2;
signal slave_24symbol: t_slave_24symbol (0 to 23);
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
signal nibble: nibble_array;
signal nibble_full: std_logic_vector(31 downto 0) := (others => '0');
subtype nyyblet is t_slave_24symbol (0 to 2);
function nybble (nyb: nyyblet) return std_logic_vector is
-- retv: std_logic_vector(3 downto 0);
begin
if nyb = nyyblet'(1, 2, 0) then
return "0000";
elsif nyb = nyyblet'(2, 0, 0) then
return "0001";
elsif nyb = nyyblet'(0, 2, 0) then
return "0010";
else
return "1111";
end if;
end function;
begin
-- nibble(0) <= "0000" when slave_24symbol(0 to 2) = nyyblet'(1,2,0) else
-- "0001" when slave_24symbol(0 to 2) = nyyblet'(2,0,0) else
-- "0010" when slave_24symbol(0 to 2) = nyyblet'(0,2,0) else
-- "1111";
-- but later
--
-- nibble(3) <= "0000" when slave_24symbol(91011) = 012 else
--
-- . . .
--
-- and at the end
--
-- nibble_full <= nibble(0) & nibble(1) & nibble(2) & nibble(3) & nibble(4)
-- & nibble(5) & nibble(6) & nibble(7);
process (slave_24symbol)
begin
for i in nibble'range loop
nibble(i) <= nybble(slave_24symbol(3 * i to 2 + i * 3));
end loop;
end process;
end architecture;
architecture concurrent of depython is
type t_slave_24symbol is array (natural range <>) of integer range 0 to 2;
signal slave_24symbol: t_slave_24symbol (0 to 23);
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
signal nibble: nibble_array;
signal nibble_full: std_logic_vector(31 downto 0) := (others => '0');
subtype nyyblet is t_slave_24symbol (0 to 2);
function nybble (nyb: nyyblet) return std_logic_vector is
-- retv: std_logic_vector(3 downto 0);
begin
if nyb = nyyblet'(1, 2, 0) then
return "0000";
elsif nyb = nyyblet'(2, 0, 0) then
return "0001";
elsif nyb = nyyblet'(0, 2, 0) then
return "0010";
else
return "1111";
end if;
end function;
begin
-- process (slave_24symbol)
-- begin
-- for i in nibble'range loop
-- nibble(i) <= nybble(slave_24symbol(3 * i to 2 + i * 3));
-- end loop;
-- end process;
NIBBLE_IT:
for i in nibble'range generate
nibble(i) <= nybble(slave_24symbol(3 * i to 2 + i * 3));
end generate;
end architecture;
architecture all_in_one_function of depython is
type c_integer_array is array (natural range <>) of integer range 0 to 2;
subtype t_slave_24symbol is c_integer_array (0 to 23);
signal slave_24symbol: t_slave_24symbol := (
1,2,0, 2,0,0, 0,2,0, 0,0,0, 0,0,1, 0,0,2, 0,1,0, 0,1,1);
signal nibble_full: std_logic_vector (31 downto 0);
function nybble (slave: t_slave_24symbol) return std_logic_vector is
type nibble_array is array (0 to 7) of std_logic_vector(3 downto 0);
variable nib: nibble_array;
subtype nyyblet is c_integer_array (0 to 2);
begin
for i in nib'range loop
if slave(3 * i to 2 + i * 3) = nyyblet'(1, 2, 0) then
nib(i) := "0000";
elsif slave(3 * i to 2 + i * 3) = nyyblet'(2, 0, 0) then
nib(i) := "0001";
elsif slave(3 * i to 2 + i * 3) = nyyblet'(0, 2, 0) then
nib(i) := "0010";
else
nib(i) := "1111";
end if;
end loop;
return nib(0) & nib(1) & nib(2) & nib(3) &
nib(4) & nib(5) & nib(5) & nib(7);
end function;
function to_string (inp: std_logic_vector) return string is
variable image_str: string (1 to inp'length);
alias input_str: std_logic_vector (1 to inp'length) is inp;
begin
for i in input_str'range loop
image_str(i) := character'VALUE(std_ulogic'IMAGE(input_str(i)));
end loop;
return image_str;
end function;
begin
NIBBLE_IT:
nibble_full <= nybble(slave_24symbol);
process
begin
wait for 0 ns;
report "nibble_full = " & to_string (nibble_full);
wait;
end process;
end architecture;