C++ 生成文件时出错,从src目录中的全部生成
我一直在尝试复制我在网上找到的一个makefile。我目前遇到以下错误:C++ 生成文件时出错,从src目录中的全部生成,c++,makefile,C++,Makefile,我一直在尝试复制我在网上找到的一个makefile。我目前遇到以下错误: MyComputer:folderName userName$ make make: bin/kernel: No such file or directory make: *** [bin/kernel] Error 1 makefile源如下所示: ### Typing 'make' will create the executable file. CC = gcc CFLAGS = -g -Wall LDFLAG
MyComputer:folderName userName$ make
make: bin/kernel: No such file or directory
make: *** [bin/kernel] Error 1
makefile源如下所示:
### Typing 'make' will create the executable file.
CC = gcc
CFLAGS = -g -Wall
LDFLAGS =
LIBS = -lstdc++
TARGET = kernel
SRCDIR = src
OBJDIR = obj
BINDIR = bin
#TARGETDIR = $(BINDIR)/$(TARGET)
SOURCES := $(wildcard $(SRCDIR)/*.cc)
INCLUDES := $(wildcard $(SRCDIR)/*.h)
OBJECTS := $(SOURCES:$(SRCDIR)/%.cc=$(OBJDIR)/%.o)
rm = rm -f
$(BINDIR)/$(TARGET): $(OBJECTS)
@$(LINKER) $@ $(LFLAGS) $(OBJECTS) $(LIBS)
@echo "Linking complete!"
$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cc
@$(CC) $(CFLAGS) -c $< -o $@
@echo "Compiled "$<" successfully!"
#$(CC) $(CFLAGS) $(LFLAGS) -o $(MAIN) $(OBJS) $(LIBS) $@
#make clean removed from this code, unnecessary
###键入“make”将创建可执行文件。
CC=gcc
CFLAGS=-g-墙
LDFLAGS=
LIBS=-lstdc++
目标=内核
SRCDIR=src
OBJDIR=obj
BINDIR=bin
#TARGETDIR=$(BINDIR)/$(TARGET)
来源:=$(通配符$(SRCDIR)/*.cc)
包括:=$(通配符$(SRCDIR)/*.h)
对象:=$(源:$(SRCDIR)/%.cc=$(OBJDIR)/%.o)
rm=rm-f
$(BINDIR)/$(目标):$(对象)
@$(链接器)$@$(LFLAGS)$(对象)$(LIBS)
@echo“链接完成!”
$(对象):$(OBJDIR)/%.o:$(SRCDIR)/%.cc
@$(CC)$(CFLAGS)-c$<-o$@
@echo“Compiled”$您的生成文件假定项目目录的结构如下:
.
├── bin
├── Makefile
├── obj
└── src
└── main.cc
我修改了链接阶段,因为您没有定义$(链接器)
:
CC = gcc
CFLAGS = -g -Wall
LDFLAGS =
LIBS = -lstdc++
TARGET = kernel
SRCDIR = src
OBJDIR = obj
BINDIR = bin
SOURCES := $(wildcard $(SRCDIR)/*.cc)
INCLUDES := $(wildcard $(SRCDIR)/*.h)
OBJECTS := $(SOURCES:$(SRCDIR)/%.cc=$(OBJDIR)/%.o)
rm = rm -f
$(BINDIR)/$(TARGET): $(OBJECTS)
@$(CC) -o $@ $(LFLAGS) $(OBJECTS) $(LIBS)
@echo "Linking complete!"
$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cc
@$(CC) $(CFLAGS) -c $< -o $@
@echo "Compiled "$<" successfully!"
Makefile假定项目目录的结构如下所示:
.
├── bin
├── Makefile
├── obj
└── src
└── main.cc
我修改了链接阶段,因为您没有定义$(链接器)
:
CC = gcc
CFLAGS = -g -Wall
LDFLAGS =
LIBS = -lstdc++
TARGET = kernel
SRCDIR = src
OBJDIR = obj
BINDIR = bin
SOURCES := $(wildcard $(SRCDIR)/*.cc)
INCLUDES := $(wildcard $(SRCDIR)/*.h)
OBJECTS := $(SOURCES:$(SRCDIR)/%.cc=$(OBJDIR)/%.o)
rm = rm -f
$(BINDIR)/$(TARGET): $(OBJECTS)
@$(CC) -o $@ $(LFLAGS) $(OBJECTS) $(LIBS)
@echo "Linking complete!"
$(OBJECTS): $(OBJDIR)/%.o : $(SRCDIR)/%.cc
@$(CC) $(CFLAGS) -c $< -o $@
@echo "Compiled "$<" successfully!"
谢谢你的帮助!这起作用了。给未来读者的小提示:我也弄糟了(这个人的解决方案)第17行:LFLAGS
应该是LDFLAGS
谢谢你的帮助!这起作用了。给未来读者的小提示:我还弄乱了(这个人的解决方案)第17行:LFLAGS
应该是LDFLAGS