linux makefile帮助基于make gnu或make linux规则声明FC FFLAGS变量

我正在尝试修改我的Makefile，以便可以键入

“制造gnu”或“制造英特尔”

它将编译所有内容，唯一的区别是

FC=gfortran-4.8或ifort， 和 FFLAGS=gfortran或ifort的适当标志

有人能帮我做点什么吗

SOURCES = a1.f a2.f a3.f
OBJECTS = $(SOURCES:.f=.o)
TARGET = myexececutable.x

gnu: GNU_FC $(TARGET)

intel: INTEL_FC $(TARGET)

GNU_FC:
    FC = gfortran-4.8
    FFLAGS = -O3 -mcmodel=medium -shared

INTEL_FC:
    FC = ifort
    FFLAGS = -O3 -mcmodel medium -shared-intel

$(TARGET): $(OBJECTS)
$(OBJECTS): $(SOURCES)

.f.o:
    $(FC) -c $(FFLAGS) $*.f

---

您可能正在寻找MAKECMDGOALS

下面我大致修改了您的Makefile，请检查以下内容：-

SOURCES = a1.f a2.f a3.f
    OBJECTS = $(SOURCES:.f=.o)
    TARGET = myexececutable.x

    gnu: GNU_FC $(TARGET)

    intel: INTEL_FC $(TARGET)

    ifeq ($(MAKECMDGOALS),gnu)
    GNU_FC:
        FC = gfortran-4.8
        FFLAGS = -O3 -mcmodel=medium -shared
    endif

    ifeq ($(MAKECMDGOALS),intel)
    INTEL_FC:
        FC = ifort
        FFLAGS = -O3 -mcmodel medium -shared-intel
    endif

    $(TARGET): $(OBJECTS)
    $(OBJECTS): $(SOURCES)

    .f.o:
        $(FC) -c $(FFLAGS) $*.f

更多信息可以在这里获得

---

谢谢。基于你的帮助，我让它按我的意愿工作。 这是我的makefile，它运行得很好。 如果您键入没有参数的justmakefile，那么它将执行all:部分并停止，这很好，因为它会强制用户明确说明是使用gnu编译器还是英特尔编译器。。。或者别的什么

COMPILER_VERSION = "Intel 64 Compiler 16.0 and gfortran-4.8"

SOURCES = \
program1.f \
program2.f \
program3.f

OBJECTS = $(SOURCES:.f=.o)
TARGET = ../lib/mylib.a

all:
       @echo ""
       @echo "   type either     make intel     or     make gnu"
       @echo ""

intel: INTEL_FC linux
gnu:   GNU_FC linux

ifeq ($(MAKECMDGOALS),intel)
  INTEL_FC:
    FC = ifort
    FFLAGS = -O3 -integer-size 64 -real-size 64 -align -pad -mcmodel medium -shared-intel
endif

ifeq ($(MAKECMDGOALS),gnu)
  GNU_FC:
    FC = gfortran-4.8
    FFLAGS = -O3 -falign-commons -finit-local-zero -fdefault-integer-8 -fdefault-real-8 -mcmodel=medium -shared -fopenmp
endif

linux: ECHO1 $(TARGET)
        @echo
        @echo -n "   "
        ar r $(TARGET) $(OBJECTS)
        @echo
        @echo -n "   "
        ranlib $(TARGET)
        @echo

$(TARGET): $(OBJECTS)

$(OBJECTS): $(SOURCES)

.f.o:
        @echo -n "   "
        $(FC) -c $(FFLAGS) $*.f

cleanall:
        @echo
        rm -f $(OBJECTS) $(TARGET)
        @echo

clean:
        @echo
        rm -f $(OBJECTS)
        @echo

ECHO1:
        @echo
        @echo "   Makefile written for the compiler version ${COMPILER_VERSION}"
        @echo