Verilog 理解xy路由逻辑的代码

在下面的xy路由算法的Verilog代码中，我不理解参数

PORT_NUM

的用法。另外，这个代码设计了多少个端口？2X2还是4X4？请给我解释一下代码

`define LOG2    function integer log2;\
 input integer number;    begin    \
    log2=0;    \
    while(2**log2<number) begin    \
       log2=log2+1;    \
    end    \     
   end    \
 endfunction // log2 


module look_ahead_xy #(
    parameter PORT_NUM                    =    5,
    parameter X_NODE_NUM                    =    4,
    parameter Y_NODE_NUM                    =    4,
    parameter SW_X_ADDR                    =    2,
    parameter SW_Y_ADDR                    =    1,
    parameter PORT_NUM_BCD_WIDTH        =    log2(PORT_NUM),
    parameter X_NODE_NUM_WIDTH            =    log2(X_NODE_NUM),
    parameter Y_NODE_NUM_WIDTH            =    log2(Y_NODE_NUM)    
    )
    (
    input     [X_NODE_NUM_WIDTH-1        :0]    dest_x_node_in,
    input        [Y_NODE_NUM_WIDTH-1        :0]    dest_y_node_in,
    output    [PORT_NUM_BCD_WIDTH-1    :0]    port_num_out// one extra bit will be removed by cross bar switch later
    );

    `LOG2

    /*
    localparam LOCAL    =        5'b00001;  
    localparam EAST    =        5'b00010;    
    localparam NORTH    =        5'b00100;  
    localparam WEST    =        5'b01000;  
    localparam SOUTH    =        5'b10000;  
    */

    localparam LOCAL    =        3'd0;  
    localparam EAST    =        3'd1; 
    localparam NORTH    =        3'd2;  
    localparam WEST    =        3'd3;  
    localparam SOUTH    =        3'd4;  


    reg [PORT_NUM_BCD_WIDTH-1            :0]    port_num_next;


    wire signed [X_NODE_NUM_WIDTH        :0] xc;//current 
    wire signed [X_NODE_NUM_WIDTH        :0] xd;//destination
    wire signed [Y_NODE_NUM_WIDTH        :0] yc;//current 
    wire signed [Y_NODE_NUM_WIDTH        :0] yd;//destination
    wire signed [X_NODE_NUM_WIDTH        :0] xdiff;
    wire signed [Y_NODE_NUM_WIDTH        :0] ydiff; 


    assign     xc     ={1'b0, SW_X_ADDR [X_NODE_NUM_WIDTH-1        :0]};
    assign     yc     ={1'b0, SW_Y_ADDR [Y_NODE_NUM_WIDTH-1        :0]};
    assign    xd        ={1'b0, dest_x_node_in};
    assign    yd     ={1'b0, dest_y_node_in};
    assign     xdiff    = xd-xc;
    assign    ydiff    = yd-yc;
    assign    port_num_out= port_num_next;

    always@(*)begin
            port_num_next    = LOCAL;
            if                (xdiff    >  1)        port_num_next    = EAST;
            else if        (xdiff    < -1)        port_num_next    = WEST;
            else if        (xdiff    ==    1 || xdiff    ==    -1     )begin
                if            (ydiff    >= 1)        port_num_next    = SOUTH;
                else if     (ydiff    ==    0)        port_num_next    = LOCAL;
                else                                 port_num_next    = NORTH;
            end// xdiff    ==    1 || xdiff    ==    -1     
            else begin //xdiff ==0
                if            (ydiff    >    1)        port_num_next    = SOUTH;
                else if    (ydiff    ==    1)        port_num_next    = LOCAL;
                else if    (ydiff    ==-1)        port_num_next    = LOCAL; 
                else if    (ydiff    < -1)        port_num_next    = NORTH; 
                else                                 port_num_next    = {PORT_NUM_BCD_WIDTH{1'bx}}; //xdiff ==0
            end //else
    end


endmodule

定义LOG2函数整数LOG2\ 输入整数；开始\ log2=0\ 而（2**log2 1）port_num_next=EAST； 如果（xdiff<-1）port_num_next=WEST，则为else； 否则，如果（xdiff==1 | | xdiff===1）开始 如果（ydiff>=1）port_num_next=SOUTH； 如果（ydiff==0）port_num_next=LOCAL，则为else； else port_num_next=北； 结束//xdiff==1 | | xdiff==1 else begin//xdiff==0 如果（ydiff>1）port_num_next=SOUTH； 如果（ydiff==1）port_num_next=LOCAL，则为else； 如果（ydiff==-1）port_num_next=LOCAL，则为else； 如果（ydiff<-1）port_num_next=NORTH，则为else； else port_num_next={port_num_BCD_WIDTH{1'bx}//xdiff==0 完//else 结束 端模

---

PORT\u NUM

是输出

PORT\u NUM\u out

可以用二进制表示的最大十进制数。由于可由

N

位表示的最大位数是

MaxNum=2^N

，因此获得给定最大位数的逆运算是

N=log2（MaxNum）

。这用于确定输出的宽度

PORT\u NUM\u BCD\u width