Vhdl 进程内部的实体实例化

我试图制作一个具有特定逻辑的二维全加器阵列，包括它们的输入和输出。我现在有两个for generate语句来生成行和列，还有一个if-elsif-else语句来决定如何连接这个全加器。我的代码如下所示：

   rows : for row in 0 to n-1 generate
    columns : for col in 0 to n-1 generate
            if row = 0 then 
                null;
            elsif row = 1 then
                first: entity work.fa
                port map (  A => Ain(row)(col),
                                B => Bin(row)(col),
                                sum => sum(row+1)(col),
                                cin => cin,
                                cout => cout(row)(col+1)
                             );
            else
                process begin
                if (row = n/2) then
                    last: entity work.fa
                    port map ( A => Ain(row)(col),
                                B => Bin(row)(col-offset),
                                sum => sum(row)(col-offset),
                                cin => cin,
                                cout => cout(row)(col)
                             );
                else
                    middle: entity work.fa
                    port map (  A => mandq(row)(col-offset), 
                                B => sout(row)(col-offset),
                                sum => sout(row)(col-offset),
                                cin => cout(row)(col),
                                cout => cout(row)(col+1)
                             );
                end if;
                end process;
            end if;
            end process;
    end generate;
 end generate;

rows : for row in 1 to n-1 generate -- shouldn't this only go to (n/2) ?
    columns : for col in 0 to n-1 generate
        element: case row generate
            -- when 0 no longer occurs with modified range
            when 1 =>
                first: entity work.fa
                port map (
                    A => Ain(row)(col),
                    B => Bin(row)(col),
                    sum => sum(row+1)(col),
                    cin => cin,
                    cout => cout(row)(col+1)
                    );
            when n/2 =>
                last: entity work.fa
                port map (
                    A => Ain(row)(col),
                    B => Bin(row)(col-offset),
                    sum => sum(row)(col-offset),
                    cin => cin,
                    cout => cout(row)(col)
                    );
            when others =>
                middle: entity work.fa
                port map (
                    A => mandq(row)(col-offset), 
                    B => sout(row)(col-offset),
                    sum => sout(row)(col-offset),
                    cin => cout(row)(col),
                    cout => cout(row)(col+1)
                    );
        end generate;
    end generate;
end generate;

每个实体都会出现以下错误： -“实体”附近的语法错误。 -“端口”附近的语法错误。 -靠近“；”的语法错误

“实体”错误出现在标题为

first

、

middle

和

last

“端口”问题发生在实体之后的线路上

“；”问题发生在包含以

结尾的端口映射的行上

进程不应该出现在if语句中。它应该只在建筑主体内部单独运行

您不能（也不需要）使用流程进行实体实例化。在这个过程中，你们写的东西是连续的，例如一些并行语句，它们对时钟边缘很敏感。但绝对不是实体实例化

您可能想使用process，因为它有
if…else
语句。它的并行等价物是
when…else
语句。但我不确定在这里应该如何使用它。正如user1155120在评论中已经提到的，您应该发布一个最小的、完整的和可验证的示例。您错过了所有声明，包括实体

编辑：
当然也有
if…generate
，正如J.H.Bonarius所写。
如果。。然后

，但如果..则使用

。。生成

。 在VHDL-2008中，这变得非常简单，正如

elsif。。支持生成

etc。甚至

案例。。。生成

你可以这样写：

   rows : for row in 0 to n-1 generate
    columns : for col in 0 to n-1 generate
            if row = 0 then 
                null;
            elsif row = 1 then
                first: entity work.fa
                port map (  A => Ain(row)(col),
                                B => Bin(row)(col),
                                sum => sum(row+1)(col),
                                cin => cin,
                                cout => cout(row)(col+1)
                             );
            else
                process begin
                if (row = n/2) then
                    last: entity work.fa
                    port map ( A => Ain(row)(col),
                                B => Bin(row)(col-offset),
                                sum => sum(row)(col-offset),
                                cin => cin,
                                cout => cout(row)(col)
                             );
                else
                    middle: entity work.fa
                    port map (  A => mandq(row)(col-offset), 
                                B => sout(row)(col-offset),
                                sum => sout(row)(col-offset),
                                cin => cout(row)(col),
                                cout => cout(row)(col+1)
                             );
                end if;
                end process;
            end if;
            end process;
    end generate;
 end generate;

rows : for row in 1 to n-1 generate -- shouldn't this only go to (n/2) ?
    columns : for col in 0 to n-1 generate
        element: case row generate
            -- when 0 no longer occurs with modified range
            when 1 =>
                first: entity work.fa
                port map (
                    A => Ain(row)(col),
                    B => Bin(row)(col),
                    sum => sum(row+1)(col),
                    cin => cin,
                    cout => cout(row)(col+1)
                    );
            when n/2 =>
                last: entity work.fa
                port map (
                    A => Ain(row)(col),
                    B => Bin(row)(col-offset),
                    sum => sum(row)(col-offset),
                    cin => cin,
                    cout => cout(row)(col)
                    );
            when others =>
                middle: entity work.fa
                port map (
                    A => mandq(row)(col-offset), 
                    B => sout(row)(col-offset),
                    sum => sout(row)(col-offset),
                    cin => cout(row)(col),
                    cout => cout(row)(col+1)
                    );
        end generate;
    end generate;
end generate;

---

流程语句部分只能包含顺序语句。组件实例化（例如您的设计实体work.fa）是并发语句。您可以尝试使用

if…generate

构造来生成需求实例化。您的代码示例并不是一个特别缺少的声明，这意味着很难有人向你展示正确的结构，也不可能复制错误。这是否回答了你的问题？如果。。。生成？；）