如何使用Verilog描述8位七段显示器
我应该连接到一个8位数的七段显示器 这是电路的外观: 这是我的代码:如何使用Verilog描述8位七段显示器,verilog,Verilog,我应该连接到一个8位数的七段显示器 这是电路的外观: 这是我的代码: `timescale 1ns / 1ps module TimeMUXDisplay(input clk,input [5:0] DIN, output reg [7:0] E,output reg [6:0] C,output DP); //Counter reg [19:0]Counter; initial Counter=0; always@(posedge clk) Counter <= Counter
`timescale 1ns / 1ps
module TimeMUXDisplay(input clk,input [5:0] DIN,
output reg [7:0] E,output reg [6:0] C,output DP);
//Counter
reg [19:0]Counter;
initial
Counter=0;
always@(posedge clk)
Counter <= Counter + 1;
//3-to-8 decoder
always @ (Counter[19:17])
begin
case(Counter[19:17])
0: E<=8'b11111110;
1: E<=8'b11111101;
2: E<=8'b11111011;
3: E<=8'b11110111;
4: E<=8'b11101111;
5: E<=8'b11011111;
6: E<=8'b10111111;
7: E<=8'b01111111;
default:E<=8'b11111111;
endcase
end
//8-to-1 MUX
reg [5:0]DOUT;
always@(DIN,Counter[19:17])
begin
case(Counter[19:17])
3'd0:DOUT<=DIN[5:0];
3'd1:DOUT<=6'b000001;
3'd2:DOUT<=6'b000001;
3'd3:DOUT<=6'b000001;
3'd4:DOUT<=6'b000001;
3'd5:DOUT<=6'b000001;
3'd6:DOUT<=6'b000001;
3'd7:DOUT<=6'b000001;
default:DOUT<=6'b000001; // indicates null
endcase
end
// Binary-to-seven segment
wire Enb;
assign Enb=DOUT[5];
always @(*)
begin
if(Enb)
case(DOUT[4:1])
0:C<=7'b1111110;
1:C<=7'b0110000;
2:C<=7'b1101101;
3:C<=7'b1111001;
4:C<=7'b0110011;
5:C<=7'b1011011;
6:C<=7'b1011111;
7:C<=7'b1110000;
8:C<=7'b1111111;
9:C<=7'b1111011;
default: C<=7'b1111111;
endcase
else C<=7'b1111111;
end
assign DP=DOUT[0];
endmodule
编辑:
这是我的测试台(我不知道是否正确):
这是它创建的图形:
这是Vivado用代码创建的示意图:
看电路图,我想知道您是否应该驾驶零来打开7段显示器中的一个条。因此,我想知道:
0:C<=7'b1111110;
1:C<=7'b0110000;
2:C<=7'b1101101;
3:C<=7'b1111001;
4:C<=7'b0110011;
5:C<=7'b1011011;
6:C<=7'b1011111;
7:C<=7'b1110000;
8:C<=7'b1111111;
9:C<=7'b1111011;
default: C<=7'b1111111;
0:CYou说“LED不工作”。什么意思?会发生什么?马修泰勒:对不起,我指的是7段显示器,不是LED。它们应该显示用户用DIN(开关)选择的数字。现在,7段显示只显示随机线。您的代码相当复杂。这里有很多东西可能不相关,可能会掩盖问题。张贴一篇文章有很多优点。这样,你就节省了那些帮助你的人的时间,你更有可能得到答案,你甚至可能在自己创造的过程中发现问题。
`timescale 1ns / 1ps
module sim_TimeMUXDisplay();
reg [5:0]DIN;
reg clk;
wire [7:0]E;
wire [6:0]C;
wire DP;
localparam [7:0]period=1;
TimeMUXDisplay uut(clk,DIN,E,C,DP);
initial
begin
clk=0;
forever#(period/2.0)clk=~clk;
end
initial
begin
DIN=0;
#period DIN=10;
#period DIN=20;
#period DIN=121;
end
endmodule
0:C<=7'b1111110;
1:C<=7'b0110000;
2:C<=7'b1101101;
3:C<=7'b1111001;
4:C<=7'b0110011;
5:C<=7'b1011011;
6:C<=7'b1011111;
7:C<=7'b1110000;
8:C<=7'b1111111;
9:C<=7'b1111011;
default: C<=7'b1111111;
0:C<=7'b0000001;
1:C<=7'b1001111;
2:C<=7'b0010010;
3:C<=7'b0000110;
4:C<=7'b1001100;
5:C<=7'b0100100;
6:C<=7'b0100000;
7:C<=7'b0001111;
8:C<=7'b0000000;
9:C<=7'b0000100;
default: C<=7'b0000000;