键盘记住上次按下的数字VHDL

首先为我的英语不好感到抱歉，希望你能理解我的问题

我有一个项目“定时炸弹”。我使用键盘和Nexys 3 FPGA。 我必须单击两个数字，例如1和2，并通过键盘上的定义数字或字母进行确认。然后它必须显示在7段显示器上，并开始倒计时到0。12,11,10,9... 0单击一个数字（0-9）并显示它没有问题，但问题是当我想显示两个数字（10-99）时。我按下1键，然后确定它在两个7段显示器上显示。然后我按2键并在两段显示器上显示，但我只想在一段显示器上显示。所以我有结果22，但我想看到21或12，这取决于我们假设的惯例。 这两个评论的过程是我们试图这样做，但没有工作

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_unsigned.all;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity mojaklaw is
    Port (SEG : out std_logic_vector(6 downto 0);  -- segmenty wyświetlacza 
                         DP : out std_logic; -- kropki na wyswietlaczu
                         ENABLE : out std_logic_vector(3 downto 0); -- anody wyswietlacza
                         CLK : in std_logic; -- zegar
                         ROW : in std_logic_vector(3 downto 0); -- rzad klawiatury
                         COL : buffer std_logic_vector(3 downto 0); -- kolumna klawiatury
                         LEDS : out std_logic_vector(3 downto 0) ); -- diody led

end mojaklaw;

architecture Behavioral of mojaklaw is
signal Q : std_logic_vector(22 downto 0); -- 4-bitowy licznik sterujacy
signal KeyCode : std_logic_vector(3 downto 0); -- kod przycisku klawiatury
signal KeyCode1 : std_logic_vector(3 downto 0); -- kod przycisku klawiatury 2
signal DIGIT : std_logic_vector(3 downto 0); -- konwersja kodu klawiatury
signal En : std_logic; -- '0' oznacza wcisniety przycisk klawiatury




begin
DP<='1'; -- wygaszenie kropek (dots turn off)


process(CLK) begin -- 4-bit COUNTER
if rising_edge(CLK) then
if En='1' then Q<=Q+1; end if;
end if;
end process;


with Q(20 downto 19) select -- MUX
En<= ROW(0) when "00", ROW(1) when "01", ROW(2) when "10", ROW(3) when "11", '1' when others;
with Q(22 downto 21) select -- DECODER
COL<= "1110" when "00", "1101" when "01", "1011" when "10", "0111" when "11", "1111" when others;


--process(CLK) begin -- REGISTER
--if rising_edge(CLK) then
--if En='0' then KeyCode<=Q(22 downto 19); Q2<='1'; end if;
--if Q2='1' then if En='0' then KeyCode1<=KeyCode; end if;
--else KeyCode1<="1111"; end if;
--end if;
----end process;

--process (CLK) 
-- variable Q2 : integer;
--begin
--if rising_edge(CLK) then
--if Q2=1 then
--if En='0' then KeyCode1<=KeyCode; Q2:=0; end if;
--else 
--if En='0' then KeyCode<=Q(22 downto 19); Q2:=1; end if;
--end if; -- if Q2
--end if; -- if edge
--end process;

process(CLK) begin -- REGISTER keycode
if rising_edge(CLK) then
if En='0' then KeyCode<=Q(22 downto 19); 
end if; end if;
end process;



-- MUX 7SEGMENT LCD
with Q(17 downto 16) select 
DIGIT <= KeyCode when "00", KeyCode1 when "01", "1111" when "10", "1111" when others;


-- CONVERTER 7SEGMENT LCD konwersja kodu klawiatury na wyswietlacz 7segmentowy
process(DIGIT) begin
case DIGIT is
when "0011" => SEG <= "0000001"; -- 0
when "0000" => SEG <= "1001111"; -- 1
when "0100" => SEG <= "0010010"; -- 2
when "1000" => SEG <= "0000110"; -- 3
when "0001" => SEG <= "1001100"; -- 4
when "0101" => SEG <= "0100100"; -- 5
when "1001" => SEG <= "0100000"; -- 6
when "0010" => SEG <= "0001111"; -- 7
when "0110" => SEG <= "0000000"; -- 8
when "1010" => SEG <= "0000100"; -- 9
when others => SEG <= "1111111"; -- -
end case;
end process;

-- DECODER 7SEGMENT LCD
with Q(17 downto 16) select
ENABLE <= "1110" when "00", "1101" when "01",
"1011" when "10", "0111" when others ;


end Behavioral;

---

我认为你应该过滤输入信号上的小故障。您使用22而不是12的原因是小故障导致多个输入为2。你可以通过在收到你的钥匙码输入后增加一点时间延迟来做到这一点。在外部输入端至少安装一个2级同步器。故障会锁定内部状态机，因此同步非常重要。我认为您应该过滤输入信号上的故障。您使用22而不是12的原因是小故障导致多个输入为2。你可以通过在收到你的钥匙码输入后增加一点时间延迟来做到这一点。在外部输入端至少安装一个2级同步器。故障会锁定内部状态机，因此同步非常重要。

NET "CLK" LOC="V10"; # CLK

NET "COL(3)" LOC="H3"; # JC1
NET "COL(2)" LOC="L7"; # JC2
NET "COL(1)" LOC="K6"; # JC3
NET "COL(0)" LOC="G3"; # JC4
NET "ROW(3)" LOC="G1"; # JC7
NET "ROW(2)" LOC="J7"; # JC8
NET "ROW(1)" LOC="J6"; # JC9
NET "ROW(0)" LOC="F2"; # JC10


NET "SEG(6)" LOC="T17"; # A
NET "SEG(5)" LOC="T18"; # B
NET "SEG(4)" LOC="U17"; # C
NET "SEG(3)" LOC="U18"; # D
NET "SEG(2)" LOC="M14"; # E
NET "SEG(1)" LOC="N14"; # F
NET "SEG(0)" LOC="L14"; # G
NET "DP" LOC="M13"; #DP

NET "ENABLE(3)" LOC="P17"; #AN3
NET "ENABLE(2)" LOC="P18"; #AN2
NET "ENABLE(1)" LOC="N15"; #AN1
NET "ENABLE(0)" LOC="N16"; #AN0



NET "LEDS(3)" LOC="V15"; # LD3
NET "LEDS(2)" LOC="U15"; # LD2
NET "LEDS(1)" LOC="V16"; # LD1
NET "LEDS(0)" LOC="U16"; # LD0