VHDL:类型为;变量";与类型不兼容<=
能解释一下为什么我在这段代码中出现语法错误吗VHDL:类型为;变量";与类型不兼容<=,vhdl,fpga,Vhdl,Fpga,能解释一下为什么我在这段代码中出现语法错误吗 An <= "1110" when anode = "00" else AN <= "1101" when anode = "01" else An <= "1011" when anode = "10" else An <= "0111" when anode = "11"; segment <= counter_1r when anode = "00" else segment <= counter_
An <= "1110" when anode = "00" else
AN <= "1101" when anode = "01" else
An <= "1011" when anode = "10" else
An <= "0111" when anode = "11";
segment <= counter_1r when anode = "00" else
segment <= counter_10r when anode = "01" else
segment <= counter_100r when anode = "10" else
segment <= counter_1000r When anode = "11";
要了解为什么会出现错误消息,请按如下方式查看代码:
An <= "1110" when anode = "00" else (AN <= "1101")....
条件信号分配(进程外)写为:
An <=
"1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
"0000";
segment <=
counter_1r when anode = "00" else
counter_10r when anode = "01" else
counter_100r when anode = "10" else
counter_1000r When anode = "11" else
"00000000";
An您希望这些代码片段做什么?Segment=counter_1r和An=“1101”当阳极=“00”时。。等等……比较还是分配?信号分配是<代码>当阳极具有特定值时,我将分配段和特定值。在过去几天里,我看到你问了几个问题,你给我的印象是,你可以更多地接触一些权威描述VHDL语言的内容。你可以试试宾夕法尼亚大学,它给出了一些例子,而不用关注描述VHDL的语言。
An <= "1110" when anode = "00" else (AN <= "1101")....
An <= "1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
null;
An <=
"1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
"0000";
segment <=
counter_1r when anode = "00" else
counter_10r when anode = "01" else
counter_100r when anode = "10" else
counter_1000r When anode = "11" else
"00000000";